Definiciones | |
| #define | Usb_select_endpoint(ep) (UENUM = (U8)ep ) |
| #define | Usb_get_selected_endpoint() (UENUM ) |
| #define | Usb_reset_endpoint(ep) (UERST = 1 << (U8)ep, UERST = 0) |
| #define | Usb_enable_endpoint() (UECONX |= (1<<EPEN)) |
| #define | Usb_enable_stall_handshake() (UECONX |= (1<<STALLRQ)) |
| #define | Usb_reset_data_toggle() (UECONX |= (1<<RSTDT)) |
| #define | Usb_disable_endpoint() (UECONX &= ~(1<<EPEN)) |
| #define | Usb_disable_stall_handshake() (UECONX |= (1<<STALLRQC)) |
| #define | Usb_select_epnum_for_cpu() (UECONX &= ~(1<<EPNUMS)) |
| #define | Is_usb_endpoint_enabled() ((UECONX & (1<<EPEN)) ? TRUE : FALSE) |
| #define | Is_usb_endpoint_stall_requested() ((UECONX & (1<<STALLRQ)) ? TRUE : FALSE) |
| #define | Usb_configure_endpoint_type(type) (UECFG0X = (UECFG0X & ~(MSK_EPTYPE)) | ((U8)type << 6)) |
| #define | Usb_configure_endpoint_direction(dir) (UECFG0X = (UECFG0X & ~(1<<EPDIR)) | ((U8)dir)) |
| #define | Usb_configure_endpoint_size(size) (UECFG1X = (UECFG1X & ~MSK_EPSIZE) | ((U8)size << 4)) |
| #define | Usb_configure_endpoint_bank(bank) (UECFG1X = (UECFG1X & ~MSK_EPBK) | ((U8)bank << 2)) |
| #define | Usb_allocate_memory() (UECFG1X |= (1<<ALLOC)) |
| #define | Usb_unallocate_memory() (UECFG1X &= ~(1<<ALLOC)) |
| #define | Usb_ack_overflow_interrupt() (UESTA0X &= ~(1<<OVERFI)) |
| #define | Usb_ack_underflow_interrupt() (UESTA0X &= ~(1<<UNDERFI)) |
| #define | Usb_ack_zlp() (UESTA0X &= ~(1<<ZLPSEEN)) |
| #define | Usb_data_toggle() ((UESTA0X&MSK_DTSEQ) >> 2) |
| #define | Usb_nb_busy_bank() (UESTA0X & MSK_NBUSYBK) |
| #define | Is_usb_one_bank_busy() ((UESTA0X & MSK_NBUSYBK) == 0 ? FALSE : TRUE) |
| #define | Is_endpoint_configured() ((UESTA0X & (1<<CFGOK)) ? TRUE : FALSE) |
| #define | Is_usb_overflow() ((UESTA0X & (1<<OVERFI)) ? TRUE : FALSE) |
| #define | Is_usb_underflow() ((UESTA0X & (1<<UNDERFI)) ? TRUE : FALSE) |
| #define | Is_usb_zlp() ((UESTA0X & (1<<ZLPSEEN)) ? TRUE : FALSE) |
| #define | Usb_control_direction() ((UESTA1X & (1<<CTRLDIR)) >> 2) |
| #define | Usb_current_bank() ( UESTA1X & MSK_CURRBK) |
| #define | Usb_ack_fifocon() (UEINTX &= ~(1<<FIFOCON)) |
| #define | Usb_ack_nak_in() (UEINTX &= ~(1<<NAKINI)) |
| #define | Usb_ack_nak_out() (UEINTX &= ~(1<<NAKOUTI)) |
| #define | Usb_ack_receive_setup() (UEINTX &= ~(1<<RXSTPI)) |
| #define | Usb_ack_receive_out() (UEINTX &= ~(1<<RXOUTI), Usb_ack_fifocon()) |
| #define | Usb_ack_stalled() (MSK_STALLEDI= 0) |
| #define | Usb_ack_in_ready() (UEINTX &= ~(1<<TXINI), Usb_ack_fifocon()) |
| #define | Usb_kill_last_in_bank() (UENTTX |= (1<<RXOUTI)) |
| #define | Is_usb_read_enabled() (UEINTX&(1<<RWAL)) |
| #define | Is_usb_write_enabled() (UEINTX&(1<<RWAL)) |
| #define | Is_usb_read_control_enabled() (UEINTX&(1<<TXINI)) |
| #define | Is_usb_nak_in_sent() (UEINTX&(1<<NAKINI)) |
| #define | Is_usb_nak_out_sent() (UEINTX&(1<<NAKOUTI)) |
| #define | Is_usb_receive_setup() (UEINTX&(1<<RXSTPI)) |
| #define | Is_usb_receive_out() (UEINTX&(1<<RXOUTI)) |
| #define | Is_usb_in_ready() (UEINTX&(1<<TXINI)) |
| #define | Usb_send_in() (UEINTX &= ~(1<<FIFOCON)) |
| #define | Usb_send_control_in() (UEINTX &= ~(1<<TXINI)) |
| #define | Usb_free_out_bank() (UEINTX &= ~(1<<FIFOCON)) |
| #define | Usb_ack_control_out() (UEINTX &= ~(1<<RXOUTI)) |
| #define | Usb_enable_flow_error_interrupt() (UEIENX |= (1<<FLERRE)) |
| #define | Usb_enable_nak_in_interrupt() (UEIENX |= (1<<NAKINE)) |
| #define | Usb_enable_nak_out_interrupt() (UEIENX |= (1<<NAKOUTE)) |
| #define | Usb_enable_receive_setup_interrupt() (UEIENX |= (1<<RXSTPE)) |
| #define | Usb_enable_receive_out_interrupt() (UEIENX |= (1<<RXOUTE)) |
| #define | Usb_enable_stalled_interrupt() (UEIENX |= (1<<STALLEDE)) |
| #define | Usb_enable_in_ready_interrupt() (UEIENX |= (1<<TXIN)) |
| #define | Usb_disable_flow_error_interrupt() (UEIENX &= ~(1<<FLERRE)) |
| #define | Usb_disable_nak_in_interrupt() (UEIENX &= ~(1<<NAKINE)) |
| #define | Usb_disable_nak_out_interrupt() (UEIENX &= ~(1<<NAKOUTE)) |
| #define | Usb_disable_receive_setup_interrupt() (UEIENX &= ~(1<<RXSTPE)) |
| #define | Usb_disable_receive_out_interrupt() (UEIENX &= ~(1<<RXOUTE)) |
| #define | Usb_disable_stalled_interrupt() (UEIENX &= ~(1<<STALLEDE)) |
| #define | Usb_disable_in_ready_interrupt() (UEIENX &= ~(1<<TXIN)) |
| #define | Usb_read_byte() (UEDATX) |
| #define | Usb_write_byte(byte) (UEDATX = (U8)byte) |
| #define | Usb_byte_counter() ((((U16)UEBCHX) << 8) | (UEBCLX)) |
| #define | Usb_byte_counter_8() ((U8)UEBCLX) |
| #define | Usb_interrupt_flags() (UEINT) |
| #define | Is_usb_endpoint_event() (Usb_interrupt_flags() != 0x00) |
| #define Is_endpoint_configured | ( | ) | ((UESTA0X & (1<<CFGOK)) ? TRUE : FALSE) |
tests if current endpoint is configured
| #define Is_usb_endpoint_enabled | ( | ) | ((UECONX & (1<<EPEN)) ? TRUE : FALSE) |
tests if the current endpoint is enabled
| #define Is_usb_endpoint_event | ( | ) | (Usb_interrupt_flags() != 0x00) |
tests the general endpoint interrupt flags
| #define Is_usb_endpoint_stall_requested | ( | ) | ((UECONX & (1<<STALLRQ)) ? TRUE : FALSE) |
tests if STALL handshake request is running
| #define Is_usb_in_ready | ( | ) | (UEINTX&(1<<TXINI)) |
tests if IN ready
| #define Is_usb_nak_in_sent | ( | ) | (UEINTX&(1<<NAKINI)) |
tests if a NAK has been sent on IN endpoint
| #define Is_usb_nak_out_sent | ( | ) | (UEINTX&(1<<NAKOUTI)) |
tests if a NAK has been sent on OUT endpoint
| #define Is_usb_one_bank_busy | ( | ) | ((UESTA0X & MSK_NBUSYBK) == 0 ? FALSE : TRUE) |
tests if at least one bank is busy
| #define Is_usb_overflow | ( | ) | ((UESTA0X & (1<<OVERFI)) ? TRUE : FALSE) |
tests if an overflows occurs
| #define Is_usb_read_control_enabled | ( | ) | (UEINTX&(1<<TXINI)) |
tests if read allowed on control endpoint
| #define Is_usb_read_enabled | ( | ) | (UEINTX&(1<<RWAL)) |
tests if endpoint read allowed
| #define Is_usb_receive_out | ( | ) | (UEINTX&(1<<RXOUTI)) |
tests if OUT received
| #define Is_usb_receive_setup | ( | ) | (UEINTX&(1<<RXSTPI)) |
tests if SETUP received
| #define Is_usb_underflow | ( | ) | ((UESTA0X & (1<<UNDERFI)) ? TRUE : FALSE) |
tests if an underflow occurs
| #define Is_usb_write_enabled | ( | ) | (UEINTX&(1<<RWAL)) |
tests if endpoint write allowed
| #define Is_usb_zlp | ( | ) | ((UESTA0X & (1<<ZLPSEEN)) ? TRUE : FALSE) |
tests if a ZLP has been detected
| #define Usb_ack_control_out | ( | ) | (UEINTX &= ~(1<<RXOUTI)) |
acks OUT on control endpoint
| #define Usb_ack_fifocon | ( | ) | (UEINTX &= ~(1<<FIFOCON)) |
clears FIFOCON bit
| #define Usb_ack_in_ready | ( | ) | (UEINTX &= ~(1<<TXINI), Usb_ack_fifocon()) |
acks IN ready
| #define Usb_ack_nak_in | ( | ) | (UEINTX &= ~(1<<NAKINI)) |
acks NAK IN received
| #define Usb_ack_nak_out | ( | ) | (UEINTX &= ~(1<<NAKOUTI)) |
acks NAK OUT received
| #define Usb_ack_overflow_interrupt | ( | ) | (UESTA0X &= ~(1<<OVERFI)) |
acks endpoint overflow interrupt
| #define Usb_ack_receive_out | ( | ) | (UEINTX &= ~(1<<RXOUTI), Usb_ack_fifocon()) |
acks reveive OUT
| #define Usb_ack_receive_setup | ( | ) | (UEINTX &= ~(1<<RXSTPI)) |
acks receive SETUP
| #define Usb_ack_stalled | ( | ) | (MSK_STALLEDI= 0) |
acks STALL sent
| #define Usb_ack_underflow_interrupt | ( | ) | (UESTA0X &= ~(1<<UNDERFI)) |
acks endpoint underflow memory
| #define Usb_ack_zlp | ( | ) | (UESTA0X &= ~(1<<ZLPSEEN)) |
acks Zero Length Packet received
| #define Usb_allocate_memory | ( | ) | (UECFG1X |= (1<<ALLOC)) |
allocates the current configuration in DPRAM memory
| #define Usb_byte_counter | ( | ) | ((((U16)UEBCHX) << 8) | (UEBCLX)) |
returns number of bytes in FIFO current endpoint (16 bits)
| #define Usb_byte_counter_8 | ( | ) | ((U8)UEBCLX) |
returns number of bytes in FIFO current endpoint (8 bits)
| #define Usb_configure_endpoint_bank | ( | bank | ) | (UECFG1X = (UECFG1X & ~MSK_EPBK) | ((U8)bank << 2)) |
configures the current endpoint number of banks
| #define Usb_configure_endpoint_direction | ( | dir | ) | (UECFG0X = (UECFG0X & ~(1<<EPDIR)) | ((U8)dir)) |
configures the current endpoint direction
| #define Usb_configure_endpoint_size | ( | size | ) | (UECFG1X = (UECFG1X & ~MSK_EPSIZE) | ((U8)size << 4)) |
configures the current endpoint size
| #define Usb_configure_endpoint_type | ( | type | ) | (UECFG0X = (UECFG0X & ~(MSK_EPTYPE)) | ((U8)type << 6)) |
configures the current endpoint
| #define Usb_control_direction | ( | ) | ((UESTA1X & (1<<CTRLDIR)) >> 2) |
returns the control direction
| #define Usb_current_bank | ( | ) | ( UESTA1X & MSK_CURRBK) |
returns the number of the current bank
| #define Usb_data_toggle | ( | ) | ((UESTA0X&MSK_DTSEQ) >> 2) |
returns data toggle
| #define Usb_disable_endpoint | ( | ) | (UECONX &= ~(1<<EPEN)) |
disables the current endpoint
| #define Usb_disable_flow_error_interrupt | ( | ) | (UEIENX &= ~(1<<FLERRE)) |
disables flow error interrupt
| #define Usb_disable_in_ready_interrupt | ( | ) | (UEIENX &= ~(1<<TXIN)) |
disables IN ready interrupt
| #define Usb_disable_nak_in_interrupt | ( | ) | (UEIENX &= ~(1<<NAKINE)) |
disables NAK IN interrupt
| #define Usb_disable_nak_out_interrupt | ( | ) | (UEIENX &= ~(1<<NAKOUTE)) |
disables NAK OUT interrupt
| #define Usb_disable_receive_out_interrupt | ( | ) | (UEIENX &= ~(1<<RXOUTE)) |
disables receive OUT interrupt
| #define Usb_disable_receive_setup_interrupt | ( | ) | (UEIENX &= ~(1<<RXSTPE)) |
disables receive SETUP interrupt
| #define Usb_disable_stall_handshake | ( | ) | (UECONX |= (1<<STALLRQC)) |
disables the STALL handshake
| #define Usb_disable_stalled_interrupt | ( | ) | (UEIENX &= ~(1<<STALLEDE)) |
disables STALL sent interrupt
| #define Usb_enable_endpoint | ( | ) | (UECONX |= (1<<EPEN)) |
enables the current endpoint
| #define Usb_enable_flow_error_interrupt | ( | ) | (UEIENX |= (1<<FLERRE)) |
enables flow error interrupt
| #define Usb_enable_in_ready_interrupt | ( | ) | (UEIENX |= (1<<TXIN)) |
enables IN ready interrupt
| #define Usb_enable_nak_in_interrupt | ( | ) | (UEIENX |= (1<<NAKINE)) |
enables NAK IN interrupt
| #define Usb_enable_nak_out_interrupt | ( | ) | (UEIENX |= (1<<NAKOUTE)) |
enables NAK OUT interrupt
| #define Usb_enable_receive_out_interrupt | ( | ) | (UEIENX |= (1<<RXOUTE)) |
enables receive OUT interrupt
| #define Usb_enable_receive_setup_interrupt | ( | ) | (UEIENX |= (1<<RXSTPE)) |
enables receive SETUP interrupt
| #define Usb_enable_stall_handshake | ( | ) | (UECONX |= (1<<STALLRQ)) |
enables the STALL handshake for the next transaction
| #define Usb_enable_stalled_interrupt | ( | ) | (UEIENX |= (1<<STALLEDE)) |
enables STALL sent interrupt
| #define Usb_free_out_bank | ( | ) | (UEINTX &= ~(1<<FIFOCON)) |
frees OUT bank
| #define Usb_get_selected_endpoint | ( | ) | (UENUM ) |
get the currently selected endpoint number
| #define Usb_interrupt_flags | ( | ) | (UEINT) |
tests the general endpoint interrupt flags
| #define Usb_kill_last_in_bank | ( | ) | (UENTTX |= (1<<RXOUTI)) |
Kills last bank.
| #define Usb_nb_busy_bank | ( | ) | (UESTA0X & MSK_NBUSYBK) |
returns the number of busy banks
| #define Usb_read_byte | ( | ) | (UEDATX) |
returns FIFO byte for current endpoint
| #define Usb_reset_data_toggle | ( | ) | (UECONX |= (1<<RSTDT)) |
resets the data toggle sequence
| #define Usb_reset_endpoint | ( | ep | ) | (UERST = 1 << (U8)ep, UERST = 0) |
resets the selected endpoint
| #define Usb_select_endpoint | ( | ep | ) | (UENUM = (U8)ep ) |
selects the endpoint number to interface with the CPU
| #define Usb_select_epnum_for_cpu | ( | ) | (UECONX &= ~(1<<EPNUMS)) |
selects endpoint interface on CPU
| #define Usb_send_control_in | ( | ) | (UEINTX &= ~(1<<TXINI)) |
sends IN on control endpoint
| #define Usb_send_in | ( | ) | (UEINTX &= ~(1<<FIFOCON)) |
sends IN
| #define Usb_unallocate_memory | ( | ) | (UECFG1X &= ~(1<<ALLOC)) |
un-allocates the current configuration in DPRAM memory
| #define Usb_write_byte | ( | byte | ) | (UEDATX = (U8)byte) |
writes byte in FIFO for current endpoint
1.5.9